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PAA's avatar
PAA
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2 years ago

Agilex 5 Transceiver Tx failing for pll lock

Hi, I am trying to use the Dispaly port IP design example on Agilex 5 device A5ED065BB32AE4SR0 on Arrow AXE5 Eagle development board. However it appears that the Transceiver Tx PLL Lock fails to ...
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AR_A_Intel's avatar
AR_A_Intel
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2 years ago

Thanks for the update, I now transition this thread to community support. If you have a new question, Please login to https://supporttickets.intel.com/s/?language=en_US , view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.