New Contributor
Frequent Contributor1. you can refer to https://fpgacloud.intel.com/devstore/platform/16.0.0/Standard/board-update-portal-nios-ii-flashddr3-triple-speed-ethernet-uart/
2. you need an FPGA with >100KB internal Block RAM.
3. the max. internal M9K memory of MAX10 10M50 is 1,638kb. You can look into Cyclone V if you require more internal memory than 10M50.
New Contributor1. That example, like all the others, uses uCOS [unless I am mistaken]. Still useful though, as live update is something else we need to consider.
2. So that's a "Yes, this is expected". And "No, you can't run a sensible uCOS app on a MAX10".
3. So that is also a "No".
Thanks for looking though.
