Honored Contributor
Honored ContributorYou should probably tell us what it is your implementing in the custom peripheral so we know exactly what you're component is going to need.
You'll need to refer to this: http://www.altera.com/literature/manual/mnl_avalon_spec.pdf That is the specification for the Avalon memory-mapped and Avalon streaming specifications. You will be using the memory-mapped specification. 1 - You are at the very least going to have to put an Avalon memory-mapped slave port on your custom peripheral. Yes you must obey the rules of the Avalon memory-mapped specification. Don't worry, the avalon bus is extremely easy to interface to. 2 - Depending on what you are doing, you may also need an Avalon memory-mapped master (or two). For example, is your custom component going to directly access memory that the processor has written to or is going to read? Here is the basic flow. 1 - Create your Verilog or VHDL description of the peripheral. This is really the only difficult part. Make sure you obey all the rules for Avalon slaves and masters. Everything after this is easy. 2 - Use the "Component Editor" in SoPC builder to create a new SoPC component from your HDL code. This involves telling the component editor what each signal in your port list is so that it knows how to connect things to the Avalon fabric. If you need specific help here, we'll help you. 3 - After you generate your SoPC system, and get into the software world, the "system.h" file will contain information about your custom component. Primarily it will contain a macro indicating the base address in the NIOS processor's memory map. You can then use this macro to access your component. You of course are responsible for knowing what the significance of each address is in your component's address map. Typically people use the IOWR and IORD macros to access the registers in their custom component. Hope this gets you started. Don't hesitate to ask for more detail as you get further along. Jake
