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MinzhiWang
Occasional Contributor
Occasional ContributorQuestion about normal differential I/O input ports pairs to Cyclone 10 GX interconnection
Hello guys, We are using 10CX220YF780E5G devices in our application. This FPGA mainly receive ADC output data by using LVDS differential pairs interface. I can find many posts here to discuss about ...
MinzhiWangOccasional Contributor
Occasional ContributorBTW, we don't want to use Serdes for this input pulse signal. We only want to implement internal simple logic to detect and check input square "pulse".
