xytech
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ContributorQuestion about Autonomous Mode Configuration
Hi We use A10 10AX057H3F34E2SG for both PCIe GEN3.0 connected with host PC. To circumvent PCIe 100ms wake up time requirement, we may use Autonomous Mode for A10 FPGA Configuration. Some questions h...
- Hi, Please refer to chapter 4.2 of https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_avst.pdf document. It will mention which PCIe hard IP will be able to meet the 100ms wake up time. Based on that location then you will need to either mapped it to the pin planner or pin-out file for the exact pin to be connected to the PCIe host.
