Question...

As I suggested before, IMHO the best solution is using a case statement which selects the right registers pairs (and possibly the required operation) depending on regselect.

The operation:

regArr16[regselect16[1:0]][15:0] <= regArr16[regselect16[1:0]][15:0] + 16'b1;

Must be written extensively, something like this:

case(regselect16[1:0])

...

2'b00 :

begin

if (regA == 8'hFF)

regB <= regB + 8'h1;

regA <= regA + 8'h1;

end

2'b01 :

begin

if (regC == 8'hFF)

regD <= regD + 8'h1;

regC <= regC + 8'h1;

end

...

endcase

Remember that HDL is not a sequential programming language but a description of hardware behaviour. So, a register can be assigned only by a single process.

If I understood correctly and considering the example you posted, you can't assign the same physical register considering in one place regselect8 and in another regselect16: you must have a single process where all conditions must be evaluated and assignments must be made inside non overlapping cases.

Sorry I can't explain it in a clearer way right now. Maybe you can start writing some code and I would give advice.