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Kevin26's avatar
Kevin26
Icon for New Contributor rankNew Contributor
2 years ago

Questa showing red signal when both signals from an AND operation are high

I am simulating a Platform Designer Cyclone 10 LP NIOS V system in Questa Starter Edition. After generating and modifying the testbench, I run the simulation in Questa. The simulation runs smoothly...
Board Debug
_AK6DN_'s avatar
_AK6DN_
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

The w_en signal is not going high, it is going to undefined.

I suspect there are other driver(s) that also assign to w_en that are driving low.

When you drive both high and low you get an undefined, which is what you are seeing in the red trace.