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Altera_Forum
Honored Contributor
Honored Contributorquery on avalan slave interface specification
HI All, iam looking at the document of avalan mm slave interface specification.i am interested in interface level protocol with timings with respect to clock. i have attached the timing diagram ...
Altera_ForumHonored Contributor
Honored ContributorThe diagram is drawn with an extra clock cycle between the read and the write for clarity only.
If the slave design is yours, you will have to correct it. You should at least be able to accept back-to-back writes or reads, going from read to write or vice versa without that extra clock cycle shouldn't pose a problem either.
