Quartus TimeQuest TA

Hi Rysc,

Even if one doesn't use "get_clocks" in the "set_clock_groups", it automatically considers it. One can in fact check the actual command running at the console pane of TimeQuest Timing Analyzer.

My issue is that I am having a clock mux, where the inputs are generated from transceiver PLL's, and hence I can find them in "[get_clocks *]" collections. This collection displays all the pins with type {clk} which is a must for all the commands that work on clocks, e.g- set_clock_groups. But I am not able to find the clock mux output in the collection [get_clocks *] and hence am not able to use "set_clock_groups" or "set_false_path" over the output clock.

I am finding large skew b/w input and output clocks of this concerned clock mux, since Quartus puts them into different Clock Tree (Finding - All clock mux output going to GLOBAL clock tree). To reduce the implication of these large skew, I have added Phase Compensation FIFO's b/w the input and output clocks of the concerned clock mux. Since Phase Compensation FIFO has some controls that needs to be synchronized from one clock domain to another, I should use false path in such synchronization logic. Again, I can get the object ID of the clock mux output clock and am stuck with large setup as well hold violations.

Please suggest a work-around either in design or in the tool/sdc.

Thanks

Manish