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GDeXi's avatar
GDeXi
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Quartus Logic Lock flow

i'm learning Quartus User Guide like Bolck Based Design and PR. all of them are mention of Logic Lock.But I don't find any User Guide about Logic Lock(such as Quartus User Guide : Logic Lock).I d...
KennyT_altera's avatar
KennyT_altera
Icon for Super Contributor rankSuper Contributor
5 years ago

Additional, for root partition logic lock. You will need to pull most of your periphery logic to the top level and lock from there. you can refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/tt/tt-intel-fpga-design-reuse.pdf for root partition logic lock.

You can use the default Auto size and Floating location LogicLock region properties to estimate the preliminary size and location for the PR region as well.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/qts/qts_qii51026.pdf page 4-18

GDeXi's avatar
GDeXi
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Thanks,i will read this Doc and learn it