Forum Discussion

SXian3's avatar
SXian3
Icon for New Contributor rankNew Contributor
5 years ago

Quartus failed to compile Verilog code generated by AOC compiler

Environment: Intel vLab servers quipped with Stratix-10 PAC. Software: Quartus Pro 18.1.2 with patches + acceleration stack d5005_ias_2_0_pv I was trying to compile a simple OpenCL program into ver...