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TChin5
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7 years ago

Quartus complain about LVDS pin assignment for MAX V CPLD device

I have two signal "OUT_P" and "OUT_N" that I try to assign using Pin Planner with I/O standard lvds_e_r3. I try this many ways and Quartus v17.1.0 returns errors. I assigned them to D15/C14 in Bank 2...