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Altera_Forum's avatar
Altera_Forum
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12 years ago

Quartus 13.0sp1 converts sof->jic incorrectly?

I recently upgraded to quartus 13.0sp1 (linux 64bit) for the Arria V support, but now quartus is unable to convert flash programming files for our older Arria GX II devices correctly. Here's what I know:

  • The sof file generated by 13.0sp1 is fine.

  • If I convert the 13.0sp1 sof file to a jic file using 12.1sp1, the resulting jic file works when programmed via 13.0sp1.

  • It doesn't matter whether I convert the sof->jic using the GUI or the command-line; 12.1sp1 works in both cases and 13.0sp1 fails in both cases.

  • Converting sof->pof->rpd has the same behaviour. Using an sof generated by 13.0sp1, the rpd produced by 12.1sp1 works, while the 13.0sp1 produced rpd does not.

  • The rpds file differs in exactly one bit: 

cmp -l made-by-13.0sp1.rpd made-by-12.1sp1.rpd
      42 322 332
      74 272 276
      75 315 255

... I am assuming from past experience that bytes 74+75 are a checksum of some sort.

For production files we don't usually use the GUI. Instead we run this sequence of commands: 

echo "BITSTREAM_COMPRESSION=ON" > exploder_top.opt
quartus_cpf -c -o exploder_top.opt -d EPCS128 exploder_top.sof exploder_top.pof
quartus_cpf -c -o exploder_top.opt exploder_top.pof exploder_top.rpd

In case it's relevant, here are some additional details:

  • Operating system is debian/wheezy

  • Device is a EP2AGX125DF25C6ES

  • Flash chip is EPCS128-compatible (numonyx M25P128)

  • Disabling bitstream compression didn't help

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    By trying all the option flags for quartus_cpf -o, I've found the flag that controls that bit: IGNORE_EPCS_ID_CHECK. I am guessing that earlier quartus versions defaulted to allowing non-Altera flash chips and the newest quartus does not.

    Anyway, changing our build script to 

    echo -e "BITSTREAM_COMPRESSION=ON\nIGNORE_EPCS_ID_CHECK=ON"

    seems to have fixed the problem.

    Waiting on a full rebuild from a clean repository before concluding victory, but this makes sense. We use an EPCS128 compatible flash chip, but the vendor differs, so the FPGA rejects loading from our chip thanks to this flag bit.

    EDIT: Yep. It definitely works now.

    Furthermore, it seems this IGNORE_EPCS_ID_CHECK option is *NEW* to quartus 13.0sp1. The old quartus GUI had the option (defaulting to off), but the implementation (aka quartus_cpf) did not, and hence defaulted to on.

    EDIT2: Wow. The new option is rejected by quartus 12.0sp1. That means I have to break compatibility with 12.0sp1 in order to have it work with 13.0sp1.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    --- Quote Start ---

    By trying all the option flags for quartus_cpf -o, I've found the flag that controls that bit: IGNORE_EPCS_ID_CHECK. I am guessing that earlier quartus versions defaulted to allowing non-Altera flash chips and the newest quartus does not. Anyway, changing our build script to 
    echo -e "BITSTREAM_COMPRESSION=ON\nIGNORE_EPCS_ID_CHECK=ON"
    seems to have fixed the problem. Waiting on a full rebuild from a clean repository before concluding victory, but this makes sense. We use an EPCS128 compatible flash chip, but the vendor differs, so the FPGA rejects loading from our chip thanks to this flag bit. EDIT: Yep. It definitely works now. Furthermore, it seems this IGNORE_EPCS_ID_CHECK option is *NEW* to quartus 13.0sp1. The old quartus GUI had the option (defaulting to off), but the implementation (aka quartus_cpf) did not, and hence defaulted to on. EDIT2: Wow. The new option is rejected by quartus 12.0sp1. That means I have to break compatibility with 12.0sp1 in order to have it work with 13.0sp1.

    --- Quote End ---

    I am having the same problem with version 13.0 without the service pack. version 12.1 worked fine. I can create a .jic and program the connected device (EPCS128 connected to an Arria II GX), but when powering up, the FPGA continuously tries to load the EPCS128, the DCLK continuously runs. If I load the FPGA directly with an .sof programming file, the FPGA comes up correctly. I kept the previous version 12.1 .jic files and they all work fine. I could not find any place in 13.0 where I could set that option in the GUI, I am now downloading 13 SP1 to see if it is there. Where is that option in the GUI? Any help getting jic to work in Quartus 13 would be appreciated, otherwise I will have to revert back to version 12. Robert
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    I found the setting in the generate JIC file dialog, and set it to disable. This fixed the problem for me as well. Robert