Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHmmm that's odd. To eliminate Quartus from the mix try compiling a design like this as the top level (i.e. no HPS):
module top (
a,
b);
input a;
output wire b;
assign b = ~a;
This will determine if the web version can compile any design that targets an SoC device. If that works then I'm guessing there is a Qsys bug or perhaps the device selected in Qsys doesn't match the device settings for your Quartus project.