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Altera_Forum
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14 years ago

PS Configuration Using a MAX II Device

Altera has a white paper on how to use a MAX device to configure your FPGA in FPP, PS, PPA and Remote System Upgrade modes.

http://www.altera.com/literature/wp/wp_max_flash.pdf

This white paper assumes the FLASH memory used is parallel interface device of either 8 or 16 data bits wide. There is even source code available:

http://www.altera.com/literature/wp/wp_max_flash.zip

What I would like to do is configure my Stratix IV FPGA in PS mode using a MAX II device as the controller but use an EPCS128 serial FLASH as the FLASH device. I have not been able to find any information on the Altera site on how to do this other than this block diagram: Figure 10-10.

http://www.altera.com/literature/handbooks/wwhelp/wwhimpl/js/html/wwhelp.htm#href=stx4_siv51010.13.07.html

Does anyone know where I can find more detail on how PS configuration using a MAX II device works?

Thanks

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    --- Quote Start ---

    a board of myself！

    i have know to transmit the .rpd file data to FPGA by itself。

    --- Quote End ---

    If you designed the board, then you should know how to get the .rpd into the board. That is part of the design stage!

    --- Quote Start ---

    but i don't know why rbf was different with rpd！

    --- Quote End ---

    Who knows or who cares? These formats are not documented. There are compressed versions and non-compressed versions.

    If you can configure a board via JTAG, and then program the flash with the same design using .rpd or .rbf (with the appropriate configuration data bytes reversed if programming serial flash) and the board configures Ok, then the format of the source files is irrelevant.

    What exactly are you having difficulty with?

    Cheers,

    Dave