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Altera_Forum
Honored Contributor
12 years ago --- Quote Start --- Hello, I noticed a thread you created a while ago: http://www.alteraforum.com/forum/showthread.php?t=31509 matches one I created earlier this week: http://www.alteraforum.com/forum/showthread.php?t=42325 . I'm attempting to program through USB-Blaster II to a DE0-Nano device on an ARM Linux computer; did you find a good solutions? Thanks. --- Quote End --- Hi ASIC, Dave already describe your options very well! As he describe it for me in the past! When I still need to program with the USB-Blaster I use x86 machine with quartus. Otherwise I use JTAG with my specific setup. So for my setup it's working fine. Here what my setup is: Embedded ARM board with 4 GPIO connected to the Cyclone 4 JTAG lines (TCK,TMS,TDI,TDO). Using the Jamplayer 2.5: https://www.altera.com/download/legacy/jam/dnl-player.jsp Implement my own jam_jtag_io() function to do one clock for the JTAG something like: 1- Set clock to low (TCK) 2- Set TMS value 3- Set TDI value 4- // Should wait half period but I don't since my current implementation is really slow go max to 20Mhz 5- Read TDO 6- Set clock high (TCK) 7- // Should wait half period, I don't 8- Set clock to high (TCK) // This is to be sure to always finish at low Now to work with the jam player you need a .jam file: 1- Open Quartus and generate a .jic file in my case. 2- Convert .jic to .jam with "quartus_cpf -c file.jic file.jam" Then you need to copy the jamplayer and the .jam file on your ARM board and program the FPGA: 1- jamplayer -aconfigure file.jam // Wait for 25-30 minutes and success message. This depends of the size of your .jam file 2- jamplayer -aprogram file.jam // Wait for double the time of the configure and success message I always reset the FPGA with another gpio (NRESET) and 2 more to look at the FPGA status CONF_DONE and STATUS. Recommendation keep the length between the gpio and FPGA JTAG as short as possible. Hope it can help, -KA