Programming SPI-Flash with CycloneV-FPGA

Hi,
according to Intel knowledge base, it's not possible to use SFL with non-AS configuration mode. https://www.intel.com/content/www/us/en/support/programmable/articles/000074632.html
I understand this so that the SFL IP connection to AS interface atom doesn't work with other configuration mode. The question is if the problem can be bypassed modifying by editing the IP code.

Look at quartus\libraries\megafunctions\altserial_flash_loader.vhd. It instantiates cyclonev_asmiblock to get access to the AS flash port. This internal component is only available in AS configuration mode.

To use SFL for data flash under PS mode, you need to outcomment asmi_block and export flash interface to alternative top level pins.

Hi gotwer,

Following FvM's suggestion above, do you have any updates for us?

Regards,

Fakhrul

Hello FvM and Fakhrul,

Thanks for the information.

At the moment I am programming the flash via the Quartus programmer, which also works.
[quartus_pgm.exe --nios2 --device=2 --instance=0 --accept_bad_sysid --base=0x2080800 --csr=0 --epcs File]

I was hoping that there is a simple solution to create an SVF file.
Thanks again for the info.

Greetings

Hi,
it's not clear to me what flash programming in niosii mode means. How is the flash connected to FPGA?

Hi gotwer,

Any updates on the above question by FmV?

Regards,

Fakhrul

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