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Hello,
I'm having a curious problem programming my Cyclone III FPGA over JTAG. Everything was working fine until a couple days ago. Now, when I load a design via JTAG, Quartus claims the programming is successful, but all my IO pins are driven high (like my design didn't even load). Could this be a symptom of a bad FPGA. Perhaps one that got fried somehow? I haven't worked with these that much so I don't really know what they look like when they fail.
Thanks,
Andrew
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What kind of board do you use ?