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Altera_Forum
Honored Contributor
11 years agoHi,
I have included the hex-files for FPGA configuration and Nios firmware in the jic file generation. Than the FPGA and Nios Firmware will be loaded from EPCQ256 (Micron N25Q256A). I'm using Quartus 13.1.4 build 182 and a Cyclone 5CEFA7 device. After step 6 in the Knowledge Base Solution ID: rd11192013_118 (http://www.altera.com/support/kdb/solutions/rd11192013_118.html) I converted the .sof and .elf files to intel hex files: First you have to generate the srec .flash files described in step 8 sof2flash --input=hw.sof --output=hw.flash --XX –verbose Note: Replace XX with EPCS for EPCS device and replace XX with EPCQ for EPCQ device elf2flash --input=sw.elf --output=sw.flash --epcs --after=hw.flash –verbose Next convert them to ihex nios2-elf-objcopy -I srec -O ihex hw.flash hw.hex nios2-elf-objcopy -I srec -O ihex sw.flash sw.hex Now proceed with step 7 from Solution ID: rd11192013_118 After 7f choose "Add Hex Data" to include the hw.hex and sw.hex than generate the .jic Program the EPCQ with the .jic file generated with Quartus Programmer and power-cycle the board FPGA configuration should configure and Nios firmware is starting. Steps 8 and 9 aren't needed Best regards Jens