Programming FPGA, Verilog and Nios softcore

Hi hani

A1:

When you are ready to download your software into flash, the NIOS IDE has a tool for doing this (Flash Programmer under the tools menu).

You can carry on using the sof file to configure the hardware but you have to configure the FPGA every time you power it up. If you convert the sof to a pof (usually Quartus does this for you anyway) then you can download the pof to your configuration device (usually serial flash EPCS chip). This then means that the FPGA will configure itself from that memory device each time it powers up - thus saving you the bother of doing it manually.

A2:

Basically Yes.

Sorry I'm not quite sure what you mean by a "digital part" - do you mean another circuit with an interface to your NIOS board. Like the hardware, once you program your software flash device with the software program, it will run itself automatically saving you the bother of downloading it every time. The NIOS IDE will also let you debug your software - set breakpoints, step through code etc - provided you have the debug hardware in your design (which you do in SOPC builder).

A3:

Off the top of my head (without studying the documents again) I would say that you should read the hardware tutorial and then the software one - by the sounds of it you're doing both the hardware design and the software design.

The document on embedded peripherals will be of use when you're really looking at the details of the peripherals or designing new ones but I presume at the moment you're just tyring to get up and running with a "Hello World" type program.

The "SOPC Builder" will probably be of use later when you start playing around with some more complex designs.

Hope this helps.

Stick with it - if you're new to these things it always takes a while to get up and confidently running. Even as an experienced hardware designer I spent a couple of weeks "playing" with NIOS, finding my feet before I started anything approaching a serioous design.