program external nor flash (paralell) through cyclone iv (de0 nano)

FPGA is a very high speed thing, Flash is a slow IC. for fpga this task is a piece of cake. if you'l get fpga model with many pins you may communicate with ~8 flash IC-s parallely. open your flash documentation, there will be described something that is called a communication protocol - a set of rules about how to communicate with the flash. i remember i'v studied it in 1-2days so it's very easy. especially if it uses "Common Flash Interface (CFI)" it's a very nicely described protocol with timing diagrams specified in the datasheet.