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SDavi9's avatar
SDavi9
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Processor interface to transceiver PHY

I have been looking into the design process for implementing a (Optical) transceiver interface in within a Intel FPGAs. How / where does the processor (e.g. Nios) that is to be responsible for the tr...
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aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi SDavi9,


As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


Thanks.

Regards,

Aik Eu