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SDavi9's avatar
SDavi9
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Processor interface to transceiver PHY

I have been looking into the design process for implementing a (Optical) transceiver interface in within a Intel FPGAs. How / where does the processor (e.g. Nios) that is to be responsible for the tr...
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aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi SDavi9,


I will try to consult the team and get back to you with your latest feedback.


Thanks.

Regards,

Aik Eu