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SDavi9's avatar
SDavi9
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

Processor interface to transceiver PHY

I have been looking into the design process for implementing a (Optical) transceiver interface in within a Intel FPGAs. How / where does the processor (e.g. Nios) that is to be responsible for the tr...
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aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi SDavi9,


I will close the thread if no further question.


Thanks.

Regards,

Aik Eu


  • SDavi9's avatar
    SDavi9
    Icon for Occasional Contributor rankOccasional Contributor
    1 year ago

    Dear Aik Eu,

    We have a number of designs implemented with a NIOS II processor and TSE. What we need is an actual design example that implements an interface to the Cyclone 10 Gx development board transceivers via the FMC connectors AND that can be used with a NIOS processor to send and receive data ?

    Best regards

    Shmuel