Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorProblems writing/reading to SSRAM with Cyclone III starter board
Hello, I have been learning to work with the Cyclone III starter board with the goal of creating a device for an undergraduate project. I have no previous experience in digital design, and onl...
Altera_ForumHonored Contributor
Honored ContributorA few things I'd check. Check the SSRAM clock. It has to be 180 degrees out of phase than your data so that it can capture into the RAM.
For the buffer questions, my design for Cyclone II board (not Cyclone III), I use the LVTTL 3.3V. Data has to be bidirectional, the rest (adsc,bw,bwe,chipenable, outputenable and address) will be single direction from the FPGA to the SSRAM.
