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Honored Contributor
Honored ContributorProblem with MAX 10 pin assignment
Hi all, I'm currently using the MAX 10 (10M02SCU169A7G) for one our project. In MAX 10 (10M0) fpga the pin C4 and C5 are nSTATUS and CONFIG_DONE respectively. And we have used this pin for some...
Altera_ForumHonored Contributor
Honored ContributorHi,
To use the configuration and JTAG pins as user I/O in user mode, you must do the following in the Quartus Prime software: 1. On the Assignments menu, click Device. 2. Click Device and Pin Options. 3. Select the General tab of Device and Pin Options. 4. In the General Options list, do the following: • Check the Enable JTAG pin sharing. • Uncheck the Enable nCONFIG, nSTATUS, and CONF_DONE pins. https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/max-10/m10_handbook.pdfPage No 496 https://www.alteraforum.com/forum/attachment.php?attachmentid=14811 Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)
