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Altera_Forum
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13 years ago

Problem with JTAG

Hi, I use an USB Blaster cable to program an EP3C25U256 an EPCS16 with quartus II web edition 11.1. First, I programmed several times without any problem and after a while, i received an error ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I've just seen the "enable ISP real-time to allow background programming (for MAX II and MAX V devices)" was enable. May this option create some troubles in FPGA's Jtag pins?