Honored Contributor
Honored ContributorThanks kaz.
I did not mean my slack is negative. All my slacks are positive. When I generate reports using TimeQuest, DataSheet Report can also be generated. The first section of Data Sheet report is Set Up Times and the second section is Hold Times. Keep in mind that they are NOT slack, they are real setup times & hold times (If I'm wrong, please tell me). This is the case even for a simple counter. When I synthesize a simple counter & run TimeQuest, I get negative values for Hold Times. When I set Fast Input Registers & Fast Output Registers options ON, I get negative Hold Time for some ports, & positive for others. This is the case for Setup Times. Please forget about my design, this is a fundamental question. I insert the two reports here for comparison. I have attached a snapshot of my TimeQuest report as well. I would be grateful If you have a look at them & tell me what goes wrong. Synthesis 1:
+---------------------------------------------------------------------------+
; Setup Times ;
+---------------+------------+-------+-------+------------+-----------------+
; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
+---------------+------------+-------+-------+------------+-----------------+
; i_clk_enable ; clk_in ; 1.993 ; 2.406 ; Rise ; clk_in ;
; i_data_in
; clk_in ; 1.703 ; 2.096 ; Rise ; clk_in ;
; i_data_in ; clk_in ; 1.272 ; 1.674 ; Rise ; clk_in ;
; i_data_in ; clk_in ; 1.703 ; 2.096 ; Rise ; clk_in ;
; i_data_in ; clk_in ; 1.357 ; 1.747 ; Rise ; clk_in ;
; i_data_in ; clk_in ; 1.327 ; 1.715 ; Rise ; clk_in ;
; i_enable ; clk_in ; 2.051 ; 2.435 ; Rise ; clk_in ;
; i_load ; clk_in ; 2.657 ; 3.138 ; Rise ; clk_in ;
+---------------+------------+-------+-------+------------+-----------------+
+-----------------------------------------------------------------------------+
; Hold Times ;
+---------------+------------+--------+--------+------------+-----------------+
; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
+---------------+------------+--------+--------+------------+-----------------+
; i_clk_enable ; clk_in ; -1.680 ; -2.067 ; Rise ; clk_in ;
; i_data_in
; clk_in ; -0.886 ; -1.288 ; Rise ; clk_in ;
; i_data_in ; clk_in ; -0.886 ; -1.288 ; Rise ; clk_in ;
; i_data_in ; clk_in ; -1.321 ; -1.705 ; Rise ; clk_in ;
; i_data_in ; clk_in ; -0.992 ; -1.372 ; Rise ; clk_in ;
; i_data_in ; clk_in ; -0.962 ; -1.340 ; Rise ; clk_in ;
; i_enable ; clk_in ; -1.768 ; -2.140 ; Rise ; clk_in ;
; i_load ; clk_in ; -1.289 ; -1.755 ; Rise ; clk_in ;
+---------------+------------+--------+--------+------------+-----------------+
+-----------------------------------------------------------------------+
; Clock to Output Times ;
+-----------+------------+-------+-------+------------+-----------------+
; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
+-----------+------------+-------+-------+------------+-----------------+
; o_done ; clk_in ; 7.083 ; 7.151 ; Rise ; clk_in ;
+-----------+------------+-------+-------+------------+-----------------+
+-----------------------------------------------------------------------+
; Minimum Clock to Output Times ;
+-----------+------------+-------+-------+------------+-----------------+
; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
+-----------+------------+-------+-------+------------+-----------------+
; o_done ; clk_in ; 5.684 ; 5.668 ; Rise ; clk_in ;
+-----------+------------+-------+-------+------------+-----------------+
+---------------------------------------------------------------------------+
; Setup Times ;
+---------------+------------+-------+-------+------------+-----------------+
; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
+---------------+------------+-------+-------+------------+-----------------+
; i_clk_enable ; clk_in ; 2.126 ; 2.583 ; Rise ; clk_in ;
; i_data_in
; clk_in ; 1.746 ; 2.141 ; Rise ; clk_in ;
; i_data_in ; clk_in ; 1.160 ; 1.557 ; Rise ; clk_in ;
; i_data_in ; clk_in ; 1.585 ; 1.990 ; Rise ; clk_in ;
; i_data_in ; clk_in ; 1.746 ; 2.141 ; Rise ; clk_in ;
; i_data_in ; clk_in ; 1.735 ; 2.140 ; Rise ; clk_in ;
; i_enable ; clk_in ; 2.065 ; 2.499 ; Rise ; clk_in ;
; i_load ; clk_in ; 2.077 ; 2.526 ; Rise ; clk_in ;
+---------------+------------+-------+-------+------------+-----------------+
+-----------------------------------------------------------------------------+
; Hold Times ;
+---------------+------------+--------+--------+------------+-----------------+
; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
+---------------+------------+--------+--------+------------+-----------------+
; i_clk_enable ; clk_in ; -1.757 ; -2.177 ; Rise ; clk_in ;
; i_data_in
; clk_in ; -0.781 ; -1.177 ; Rise ; clk_in ;
; i_data_in ; clk_in ; -0.781 ; -1.177 ; Rise ; clk_in ;
; i_data_in ; clk_in ; -1.209 ; -1.604 ; Rise ; clk_in ;
; i_data_in ; clk_in ; -1.361 ; -1.747 ; Rise ; clk_in ;
; i_data_in ; clk_in ; -1.351 ; -1.747 ; Rise ; clk_in ;
; i_enable ; clk_in ; -1.781 ; -2.199 ; Rise ; clk_in ;
; i_load ; clk_in ; -0.948 ; -1.363 ; Rise ; clk_in ;
+---------------+------------+--------+--------+------------+-----------------+
+-----------------------------------------------------------------------+
; Clock to Output Times ;
+-----------+------------+-------+-------+------------+-----------------+
; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
+-----------+------------+-------+-------+------------+-----------------+
; o_done ; clk_in ; 7.100 ; 7.159 ; Rise ; clk_in ;
+-----------+------------+-------+-------+------------+-----------------+
+-----------------------------------------------------------------------+
; Minimum Clock to Output Times ;
+-----------+------------+-------+-------+------------+-----------------+
; Data Port ; Clock Port ; Rise ; Fall ; Clock Edge ; Clock Reference ;
+-----------+------------+-------+-------+------------+-----------------+
; o_done ; clk_in ; 5.683 ; 5.653 ; Rise ; clk_in ;
+-----------+------------+-------+-------+------------+-----------------+
