Forum Discussion
Altera_Forum
Honored Contributor
10 years agoProblem when programming Cyclone V (DE1-SoC)
Hi, I`ve recently received a DE1-SoC with a Cyclone V 5CSEMA5F31C6N. I've tried program it by three different Quartus versions (13.0sp1, 13.1 -web edition- and 15.1-prime lite edition- ) and i'...
Altera_Forum
Honored Contributor
10 years ago1) 5 min is normal time.. Have you tried to create SDC file with constraints? Without SDC it try to maximize frequency (1ghz default) and fail.
2) Bad sign.. what message do you get into processing / system output window? Have you set DIP switch correctly?