Problem Communication Between Master SPI device and Slave SPI

Although ss_n is an active-low signal, bits in slave select register must be set high in order to assert (low) the corresponding signal.

Moreover, pay attention to the fact that the slave device will send data only upon master request. So, the slave must preload data in tx register: but this will not be transmitted immediately: it will only when the master asserts ss_n and transmit some data (useful or dummy data) to the slave. With spi you always have two concurrent transfers: while MOSI is sending data from Master to Slave, MISO is sending from S to M