Forum Discussion
Honored ContributorPreserving sectors in an EPCS
Hello,
I need to update the configuration device (EPCS4N) of a Cyclone II FPGA (EP2CF4848N). Sector number 7 was used to store information that is programmed during production. I would like to maintain the information stored in this sector, but saw that when I download the new configuration using a JIC file that the complete contents of the EPCS4 device is erased before the new configuration data is programmed. Are there any tools available that will allow me to only update the lower sectors, or to read out the top sector and then program it again after the update? Thanks, Richard.14 Replies
Altera_Forumefargon,
Are you using QuartusII 9.0 sp2 or QII 9.1 sp1 ? Did you set the "Dual-purpose pins" to "User defined I/O" ASMI works fine here.- Altera_Forum
Hi,
I'm trying to operate the asmi_parallel megafunction to control an EPCS1 serial flash, through a Cyclone device. Now I can't even read the EPCS1 Silicon_ID through the asmi_parallel megafunction. I wrote a small state machine that only asserts the read_sid signal and reads the epcs_id field, but the busy signal is always at '1' , as if the machine never finishes working. EPCS_ID field is always 8'h00. I only raise the read_sid signal once and lowers it after one one clock or at another case after two clock cycles, but the busy is always at '1'. What could be the problem? I don't have a NIOS core in my system. Thanks, Eldad - Altera_Forum
Well the reason I asked was to propose some alternatives. Seems like a lots of hassle for 8 bytes of data. You could ...
1 - Remove the ASMI megafunction and let the NIOS write those values to the flash for you through the EPCS controller. You'd have to send a signal to the NIOS to let it know when you wanted it to write the data. And of course you'd have to write the little bit of C-code involved. This allows you to keep the NIOS in your permanent FPGA image. Also, I highly suspect you'd find other uses for the NIOS along the way. Once I started putting embedded processors in my FPGA designs, I became addicted. You'll never get as much use out of so few logic gates as with an embedded processor. 2 - Add an EEPROM to the board for your parameter storage. Anyway, you know what you're doing. I'm just giving some ideas. Jake - Altera_Forum
Right now, I am only writing 8 bytes of data... calibration parameters that let me tune gain and offset of an analog signal after it has been sampled. This only needs to be done when the board is manufactured. If I produce new firmware, it should be loaded in the field without having to recalibrate, a procedure that can only be done in the manufacturing facility.
- Altera_Forum
I should ask as well. What data exactly do you need to read/write from/to the EPCS device from your firmware design? Is it just the user parameters or are you also doing remote field upgrades of the firmware through this mechanism? How much data do the user parameters consist of?
Jake - Altera_Forum
Yes it does sound convoluted. However, consider the following:
1 - Your scheme is no more convoluted than using the Quartus programmer with the JIC method. The programmer downloads a special image to the FPGA which it can then use to communicate with to reprogram the flash. You'd basically be doing the same thing. 2 - You don't have to use AS for the initial config. You could program your special image into the FPGA and use the nios2-flash-programmer for your initial config. No reason to maintain two processes. 3 - I suspect your proposed method still yields a faster programming time with the NIOS over the AS method. Jake - Altera_Forum
I cannot get the ALTASMI megafunction and the Nios EPCS peripheral to get along. Perhaps I will use AS for the initial config of the EPCS. Then if I want to reconfigure the device after I have already written to the user portion of flash, I will use a separate project that just contains the Nios, program the FPGA using the sof via JTAG, then run the nios flash programmer to write the new config data to the EPCS device. Wow that sounds convoluted...
- Altera_Forum--- Quote Start --- Hi Wahilakn, I managed to get it working. What I did was to compile a minimal NIOS core, upload this first to the FPGA using the quartus_pgm.exe, and then used the nios2-flash-programmer.exe utility to erase and program only parts of the EPCS device. This is a bit of a hack, but I did not find another way to do it. Regards, Richard. --- Quote End --- Richard, I wanted to avoid NIOS if possible, but to maintain user flash, this seems to be the way to go. I am still using the ALTASMI_PARALLEL megafunction to do my reads and writes. I built a NIOS with the recommended peripherals according to the Nios II Flash Programmer User guide and added this to my project. So now the problem is that the Fitter fails. It cannot place a node: Error: Cannot place node "calibration:calibration_0|NIOS_FLSH_PRGMR:NIOS|epcs_flash_controller_0:the_epcs_flash_controller_0|tornado_epcs_flash_controller_0_atom:the_tornado_epcs_flash_controller_0_atom|internal_data0out" of type ASMI block Do you know if there is contention between the Nios and the ALTASM function? Perhaps I am missing a setting somewhere? Thanks, Kevin
- Altera_Forum
Sorry. I would have suggested this to you but I assumed you were trying to avoid NIOS.
Jake - Altera_Forum
Hi Wahilakn,
I managed to get it working. What I did was to compile a minimal NIOS core, upload this first to the FPGA using the quartus_pgm.exe, and then used the nios2-flash-programmer.exe utility to erase and program only parts of the EPCS device. This is a bit of a hack, but I did not find another way to do it. Regards, Richard.
