Forum Discussion
Altera_Forum
Honored Contributor
15 years agoYou'll have to look at the cell delays through a LUT. Be sure to use the Fast Timing Model to get the min. My guess is that it's not in the datasheet anymore(I haven't checked, but assume you have), because this value is generally pretty useless. Just changing inputs on the LUT, which users don't control, can make a big difference. Routing also tends to dominate critical paths, which is also out of user control. Could you explain why you want this and how you're using it, so maybe we can give more suggestions.
But if you really want to do it, do a 4-input function like an AND gate. Do a setup check in the slow corner to get the longest delay, and a hold check at the fast corner to get the shortest delay. This should be pretty good for finding the boundaries.