Power supply[PCB-dev.]-Cyclone IV

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Only one inductor separates these power channels. According to “Connection Guidelines” it should be an inductor with ferrite core.

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Although the symbol on the schematic looks like an inductor, its not really. The word BEAD indicates that what they have used (correctly) on the board is a ferrite bead. Look at the MuRata web site for details on the different types of beads.

http://www.murata.com/products/emc/selection_guide/emc/index.html

A ferrite bead has low resistance at DC, and an increasing resistance (impedance) with frequency. The ferrite bead is used as a filter to remove high frequency components from the power supply. The image you show is not a good filter; the ferrite bead should have capacitors on either side to create a pi-filter. The 10uF capacitor is bulk capacitance, so that does not count as part of the pi-filter. The filter should have a couple of 0.1uF or 0.01uF ceramic caps. The filter needs to have capacitors on both sides of the bead, as in one direction, the filter stops noise from the main supply coupling into you sensitive circuit (eg. PLL), and in the other direction the filter stops noise from the PLL getting back onto your main power supply.

For examples of correctly design decoupling filters, see this schematic:

http://www.ovro.caltech.edu/~dwh/carma_board/gda06rb004_carma_v0.87_dec03.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/gda06rb004_carma_v0.87_dec03.pdf)

The PCB layout files are also on this page along with links to a free viewer. The design contains both switch-mode power supplies and linear supplies.

http://www.ovro.caltech.edu/~dwh/carma_board/ (http://www.ovro.caltech.edu/%7edwh/carma_board/)

Here's some notes on the power supply designs:

http://www.ovro.caltech.edu/~dwh/carma_board/power_supply_design.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/power_supply_design.pdf)

Cheers,

Dave

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The image you show is not a good filter; the ferrite bead should have capacitors on either side to create a pi-filter

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There are more capacitors connected as DE nano schematic shows.

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My question is; how important is the isolation filter between VCCINT and VCCD and how should it be designed?

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Referring to your first question, not all Altera DevKits have a filter for VCCD_PLL, some are simply tying it VCCINT. Others are even using a separate analog voltage regulator for it.

VCCA is the most critical supply node related to PLL operation, because it's supplying the VCO. PLL stability problems have been considerably reduced since Altera introduced a FPGA internal voltage regulator for the analog PLL supply. According to my experience, VCCD isn't critical for a standard PLL application not chasing for minimum PLL jitter. In so far, a common supply for VCCINT and VCCD can be acceptable with good bypassing.

Dave and FvM,

Thanks a lot for you guys' comprehensive help (and really cool project Dave ;).

I will go for skipping the Bead filter and go for a good bypassing instead. I will try to post the results later, if it is satisfying practically, since I think it will be of good help to others.

Once again thanks!

Regards,

mr_embedded

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I will go for skipping the Bead filter and go for a good bypassing instead.

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I can tell, that this variant has been used with all Cyclone III designs I was involved with during the last years. VCCA has been mostly additionally filtered by a ferrite bead or low ohmic RC.

FvM,

OK I see! So far has the work with the PCB for an FPGA been quite extensive compared to PCB designs with microcontrollers :) There are no shortcuts hehe.

Have a great day mr.

Hi FvM,

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There are more capacitors connected as DE nano schematic shows.

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Yeah, I figured there probably was, however, even if the schematic shows the capacitors next to the bead, the PCB layout engineer can still mistakenly place the capacitors too far from the bead.

I simply wanted to point out the correct way to design a power supply filter, since that is what the original post was requesting.

Cheers,

Dave

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I simply wanted to point out the correct way to design a power supply filter, since that is what the original post was requesting.

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That's good. The DE nano schematic isn't intended to teach anything, it just shows what's there. And the DE nano design is not necessarily exemplary.

The power-supply design is now finished. I have uploaded the pictures of the schematics. All the “free” capacitors in the upper parts of the pictures will be placed close to the FPGA.

My question is now, is it nessesarry to have the filter for VCCINT? How should it be design, what value of the ferrite bead (F1_L1) and capacitor (RC1_C1) should I have?

I now I have specified the Impedance @ Frequency of the bead to 10 ohm @ 100 MHz but that is a guess.

Thanks for all the help so far guys!

http://imageshack.us/photo/my-images/819/vcca.png

http://imageshack.us/photo/my-images/857/vccd.png

http://imageshack.us/photo/my-images/163/vccint.png

http://imageshack.us/photo/my-images/688/vccio.png

Sorry had problems embedding the pictures!