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Altera_Forum
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8 years ago

PLL's in Cyclone V

Hello, I am trying to use the output of a PLL to drive a logic in FPGA. I'm not sure which clock should be connected as the 'refclk' for the PLL and how the 'outclk' of the PLL should clock my ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hello Anand,

Since my logic output is being sent to a HSMC pin (Bank 8A), I am using clock K14 now which is a dedicated PLL clock input (this is being used a refclk), could you help me understand how the connections are to be made to the PLL dedicated clock output (PIN A10 or A11) which can be used as the PLL 'clkout' to drive my logic.

Thanks a lot for your help.