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Altera_Forum
Honored Contributor
Honored ContributorPLL usage
Hello all, I've noticed that many use PLL on the reference clock input even if they do not need to divide/multiply/shift this clock or do not have external clock to synchronize to the reference fr...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- How to set the PLL in free run mode? --- Quote End --- As far as I know, the PLL behaviour during and after loss of lock is unspecified. I observed, that a PLL without input clock is often working at a low frequency (below specified range), if you don't enable automatic reset. But I fear, you can't rely on it. Particularly, you can't rule out a temporary move to high frequencies, that can cause erratic design behaviour due to timing violations.
