Forum Discussion
Altera_Forum
Honored Contributor
17 years agoPLL usage
Hello all, I've noticed that many use PLL on the reference clock input even if they do not need to divide/multiply/shift this clock or do not have external clock to synchronize to the reference fr...
Altera_Forum
Honored Contributor
16 years agoClock uncertainty is not the same as jitter. For example, if you have an input clock that you expect to be 100MHz, is that input clock really 100MHz or could it possibly be 100.0001MHz or perhaps 99.999MHz. That is clock uncertainty. By giving timequest a clock uncertainty constraint, you are telling it to perform timing analysis at the extreme ends of your uncertainty.
And as expected, this uncertainty will apply directly to the PLL outputs. Jake