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Altera_Forum's avatar
Altera_Forum
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12 years ago

PLL synchronizer

Hi,

In my design I'm using 10MHz external clock. several (not all of them) blocks inside the code are needed 50MHz clock. In order to do that I created PLL from 10MHz to 50MHz and distribute to the relevant blocks.

Do I need to use synchronizer between the 50MHz output ports to the main 10MHz signals/ ports? If I do, is one synchronizer stage will be enough?

Thanks,

Idan

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hello!

    Can you please tell me how did you create a PLL from 10MHz to 50Mhz?

    I'm new to working with FPGAs and I'm finding it difficult to work with PLLs!

    Thanks!