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Altera_Forum
Honored Contributor
Honored ContributorPLL Reconfiguration problem on Cyclone3
In our design I have to reconfigure a PLL when we change from SD to HD video mode and back. (27 and 74.25 MHz input, and different output clocks.) For some reason clock stopped working and the onl...
Altera_ForumHonored Contributor
Honored ContributorOK, I finally managed to get the PLL reconfig work.
The solution was too use the PLL in non-compensated mode, the reconfigure ok. In source-synchronous mode the PLL crashed immediately after reconfiguration. Anybody was seen that behaviour, too ?
