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Altera_Forum
Honored Contributor
Honored ContributorPLL Reconfiguration problem on Cyclone3
In our design I have to reconfigure a PLL when we change from SD to HD video mode and back. (27 and 74.25 MHz input, and different output clocks.) For some reason clock stopped working and the onl...
Altera_ForumHonored Contributor
Honored ContributorThe reconfig clock come from a PLL which is not reconfigured and cannot be. This clock does not stop.
Is it possible due to some clock routing problems.
