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Altera_Forum
Honored Contributor
15 years agoYou're expecting me to read the whole post?
As for the core issue, you state that the PLL lock signal goes high but the PLL does not lock. What symptoms are you seeing to state it's not locking? Is it not outputing a clock, or is the clock drifting, or something like that? Also, does the PLL work if you don't have any reconfiguration(i.e. a fundamental locking issue) or does it occur when adding the dynamic logic(i.e. something going wrong there)?