Forum Discussion
Altera_Forum
Honored Contributor
13 years agoFirst point. I'm missing the term simulation in the question title. Failure in PLL simulation is definitely a different problem than "PLL not locking".
As said, the PLL model is simulating some locking delay (in a 10 µs range, if I remember right). Finally, PLL simulation doesn't work with default ns Modelsim timescale, it has to be changed to ps.