PLL generation problem

I have the same problem (same warnings), but what I found is:

After a compilation with Design Space Explorer I modified the phase of two generated clocks in two PLLs. Then I ran Analysis&Synthesis and the Fitter, started TimeQuest and generated a new .sdc-File with my own .sdc-File-Template. My Template defines all clocks in the design and derives the generated clocks (well it did before the compilation with DSE).

But now the TimeQuest Analyzer generates me a .sdc-File with the old Values of the PLLs.

And when I modify the generated clocks to match the implemented PLLs, Quartus only tells me that Warning. (With expected: <old value>, found: <new value>)

Any Idea?