Is it possible to use the Cyclone ii PLL to divide down a 37.5Mhz clock on a standard input/output pin. Does it need to be on a dedicated Pin?

--- Quote Start --- Is it possible to use the Cyclone ii PLL to divide down a 37.5Mhz clock on a standard input/output pin. Does it need to be on a dedicated Pin? --- Quote End --- Why don't you try it, you have the tool in front of you? :) I believe you will be able to, however, you will get a warning about excessive jitter, since the output path is not a dedicated PLL output pin. At such a low frequency, this warning can be ignored. However, what frequency are you trying to create? You might be better off using a counter to divide a higher frequency clock down, and then use that as a toggling output. You won't get a warning in that case. Cheers, Dave

You need the dedicated clock pins for a clock input, as you can't feed a pll with a clock coming from any general purpose i/o pin. On the other hand any pin can be used as an output, with an impact on jitter, as Dave said.

Yes I should prob just try it, however I think I may have issues. I originally stated my problem incorrectly. I am actually trying to multiply the 37.5Mhz coming from a DSP to like say 10x (375Mhz) in order to offload some intensive real-time math calculations from the DSP. I do not need an external clock just internal for the calculations.

In that case you will need to feed the 37.5Mhz clock signal from the DSP to a dedicated clock input. Running some logic at 375MHz inside the Cyclone II could be a bit tricky...

Ok thanks. So it looks like i may not be able to do this since my clock is going to a general I/O. What stand-alone internal clock options does the cyclone ii have? Can it run completly independent without a crystal etc? How fast?

PLL? Cyclone ii? I/o | Altera Community

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Altera_Forum
Honored Contributor
15 years ago
--- Quote Start ---
Is it possible to use the Cyclone ii PLL to divide down a 37.5Mhz clock on a standard input/output pin. Does it need to be on a dedicated Pin?
--- Quote End ---
Why don't you try it, you have the tool in front of you? :)

I believe you will be able to, however, you will get a warning about excessive jitter, since the output path is not a dedicated PLL output pin. At such a low frequency, this warning can be ignored.

However, what frequency are you trying to create? You might be better off using a counter to divide a higher frequency clock down, and then use that as a toggling output. You won't get a warning in that case.

Cheers,
Dave

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PLL? Cyclone ii? I/o

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