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Roland_T's avatar
Roland_T
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5 years ago

Place Stage Error(19724) on Arria 10 with Quartus Prime Pro 18.1

Hello, I am currently experiencing a problem with an Arria 10 FPGA (10AS066K3F40E2SG) design that fails to fit with Quartus Prime Pro 18.1. During the Place Stage, Quartus posts several info mess...
SyafieqS's avatar
SyafieqS
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5 years ago

Hi Roland,


This error implies some clock regions might have been made too small during the compilation. There is option to counteract this issue, in your .qsf file, try compiling with the following assignment:

set_global_assignment -name GLOBAL_PLACEMENT_EFFORT "OPTIMIZE FOR HIGH UTILIZATION"


Alternatively, to enlarge the clock region, in your .qsf file, you can use Clock Region assignments.

Syntax:

set_instance_assignment -name CLOCK_REGION -to <to> -entity <entity

name> <value>


[1].https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl-pro-qsf-reference.pdf (p400) (CLOCK_REGION Setting reference)


Thanks,

Regards



  • Huseyin's avatar
    Huseyin
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    5 years ago

    Hi Syafieq,

    " set_global_assignment -name GLOBAL_PLACEMENT_EFFORT "OPTIMIZE FOR HIGH UTILIZATION" " didn't help to eliminate error I encountered but "set_instance_assignment -name CLOCK_REGION ..." worked perfectly well. Thanks a lot for your help.

    Kind Regards,

    Huseyin

    • Roland_T's avatar
      Roland_T
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      5 years ago

      Hi Huseyin, hi Syafieq,

      Thanks to both of you for your kind responses.

      Unfortunately, I confirm that" set_global_assignment -name GLOBAL_PLACEMENT_EFFORT "OPTIMIZE FOR HIGH UTILIZATION" " did not help.

      Like Huseyin, I can say that my problem was not related with the device size, because the logic utilization was around 30%.

      I temporarily addessed this issue by reducing the hardware footprint of my design, specifically targeting the fanout of the concerned clocks. That is why I have not exprerimented the second suggestion very quickly.

      With the complete design, I finally managed to fit without errors by promoting the concerned clocks to large periphery clocks : "set_instance_assignment -name GLOBAL_SIGNAL LARGE_PERIPHERY_CLOCK -to <clock_signal_name>".

      I suppose it has the same kind of impact as your suggestion of enlarging clock regions with the CLOCK_REGION assignment.

      Best regards,

      Roland