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Altera_Forum's avatar
Altera_Forum
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17 years ago

Pin problem about tri_state_bridge

Hello,

I am new useing the DE2 EP2C35 borad with Quartus II 5.1 Web Edition Full. I use Cypress CY7C1380C SSRAM which requires Avalon Tristate Bridge. After compiling the system,in the project.vhd there are the following informations.

-- the_tri_state_bridge_0_avalon_slave

signal adsc_n_to_the_ssram_0 : OUT STD_LOGIC;

signal bwe_n_to_the_ssram_0 : OUT STD_LOGIC;

signal chipenable1_n_to_the_ssram_0 : OUT STD_LOGIC;

signal outputenable_n_to_the_ssram_0 : OUT STD_LOGIC;

signal tri_state_bridge_0_address : OUT STD_LOGIC_VECTOR (20 DOWNTO 0);

signal tri_state_bridge_0_byteenablen : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);

signal tri_state_bridge_0_data : INOUT STD_LOGIC_VECTOR (31 DOWNTO 0)

I do not know how to assign the pins? I couldn't find the matching in the DE2_pin_assignments.Thank you very much for your help!

9 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Thank you for your reply. I know where to assign pins. My question is what the locationes of the pins are. For example, we know the pin location of clk is PIN_N2. What is the pin location of tri_state_bridge_0_address[0]. This is the question. Thanks.

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Look through the DE2 documentation. There'll be a schematic of the circuit in there from which you can get the correct pins.

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Thanks. But I couldn't find the matching about tri_state_bridge_0_address in the DE2_pin_assignments. Could you help me see where it is? Thanks!

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    I've looked at the DE2 schematics and I don't see the SSRAM you speak of. Please could you explain how you are going to use this device?

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    My work is to implement twofish,one of the five advanced encryption standard (http://www.nist.gov/aes/) (AES) finalists.There are some function like fopen fget,etc which require full C library.It needs bigger memory than on-chip memory. So I must use external sram,for EP2C35, it is Cypress CY7C1380C SSRAM. This is the reason I use it.

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    According to the documentation, the SSRAM on the DE2 board isn't a CY7C1380C, but an IS61LV25616. You'll find the FPGA pins list in table 4.17, pages 51 and 52.

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Thanks a lot. But in the Memory there isn't IS61LV25616. Weather there are problems with the SOPC BUILDER? I upload a picture that you could see the hardware that I could choose. It seems so strange. Thanks a lot!!!

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    You may have to create your own memory component.

    There must be some example designs for the DE2 that use the SRAM. Can you open one of them and see what they did in SOPC builder?