Forum Discussion
Altera_Forum
Honored Contributor
9 years agoIf you wanted to use one PLL (ALTLVDS_TX instantiates a PLL), you should use the input clk pin that is physically connected to that PLL. You can refer to the datasheet for that.
Same rule applies on output pins when you want to assign PLL clock outputs. I think your problem is that your design violates these rules.