PHY Ethernet to optics without external chip

When having a look at the documentation (http://www.altera.com/literature/ug/ug_ethernet.pdf) on pages 4-26 and onwards, it looks like both FPGAs with transceivers and the ones with regular LVDS drivers and soft CRD are supported. Of course the best way to be sure the FPGA you choose will be able to handle it is to create a Quartus project with it and check that it compiles correctly. It will help also to find out if you are defining your I/Os correctly, especially when you try to compile single-ended and LVDS I/Os in the same banks.