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PCrou1's avatar
PCrou1
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5 years ago

PDN Tool : what exactly is core clock frequency

Hello,

I am currently designing a board with an Arria 10 and I used the relevant PDB tool v19.0.

I am wondering what the clock core frequency refers to. Is it the frequency of the design or the frequency for the core in case of a SOC ? And in this case, what should be the value if there is no SOC in the FPGA ?

This parameter seems to have a huge impact on the count of decoupling capacitor so it's important it should be set properly.

Until now, I have set to Medium.

I've read the Device-Specific Power Delivery Network (PDN) Tool 2.0 User Guide. It does explain what this frequency is used for but not what it is and where this information can be found.

2 Replies

  • EngWei_O_Intel's avatar
    EngWei_O_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    5 years ago

    Hi Pascale Crouzillat

    Sorry for delayed response due to long holiday. Is it possible for you to include the excel xls that you are using?

    Thanks.

    Eng Wei

    • EngWei_O_Intel's avatar
      EngWei_O_Intel
      Icon for Frequent Contributor rankFrequent Contributor
      5 years ago

      Hi Pascale Crouzillat

      We do not receive any response from you to the previous question that we have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

      Eng Wei