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Altera_Forum
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10 years ago

PCIe Refclk differential pairs pin-connetion problem

PCIe Refclk differential pairs pin-connetion problem Hello, Now I have an already-made PCB board with an EP4GX50 device in F484 package and I'm repalnning the pin assigments of the P...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

I think you're right cause I find a note that "Clock output from PLLs in the FPGA core cannot feed into PLLs used by the transceiver as input reference clock." So I'm gonna redraw the PCB board.

Thanks