PCIe Refclk differential pairs pin-connetion problem

Because of the structure of the Cyclone IV, basically, no. There isn't a way of fitting the design unless you can move the clock onto REFCLK2.

Sometimes it is possible to use a second PLL. You use one to drive the signal onto the GCLK network, then feed that clock as the reference clock for your PCIe core (which in turn connects to the PLL for the PCIe). However in the Cyclone IV, the datasheet leads me to believe that this would not work. You could try it, but I doubt the design would fit.